構文
構文Little Endian
struct arbelprm_query_dev_lim_st
ファイル名
ファイル名構造体情報
構造体情報| No. | 名称 | 属性 | 説明 |
|---|---|---|---|
1 |
arbelprm_query_dev_lim_st | Little Endian | |
| reserved0[0x00080] | pseudo_bit_t | ||
| log_max_qp[0x00005] | pseudo_bit_t | Log2 of the Maximum number of QPs supported | |
| reserved1[0x00003] | pseudo_bit_t | ||
| log2_rsvd_qps[0x00004] | pseudo_bit_t | Log (base 2) of the number of QPs reserved for firmware use | |
| reserved2[0x00004] | pseudo_bit_t | ||
| log_max_qp_sz[0x00008] | pseudo_bit_t | The maximum number of WQEs allowed on the RQ or the SQ is 2^log_max_qp_sz-1 | |
| log_max_srq_sz[0x00008] | pseudo_bit_t | The maximum number of WQEs allowed on the SRQ is 2^log_max_srq_sz-1 | |
| log_max_ee[0x00005] | pseudo_bit_t | Log2 of the Maximum number of EE contexts supported | |
| reserved3[0x00003] | pseudo_bit_t | ||
| log2_rsvd_ees[0x00004] | pseudo_bit_t | Log (base 2) of the number of EECs reserved for firmware use | |
| reserved4[0x00004] | pseudo_bit_t | ||
| log_max_srqs[0x00005] | pseudo_bit_t | Log base 2 of the maximum number of SRQs supported, valid only if SRQ bit is set. | |
| reserved5[0x00007] | pseudo_bit_t | ||
| log2_rsvd_srqs[0x00004] | pseudo_bit_t | Log (base 2) of the number of reserved SRQs for firmware use | |
| log_max_cq[0x00005] | pseudo_bit_t | Log2 of the Maximum number of CQs supported | |
| reserved6[0x00003] | pseudo_bit_t | ||
| log2_rsvd_cqs[0x00004] | pseudo_bit_t | Log (base 2) of the number of CQs reserved for firmware use | |
| reserved7[0x00004] | pseudo_bit_t | ||
| log_max_cq_sz[0x00008] | pseudo_bit_t | Log2 of the Maximum CQEs allowed in a CQ | |
| reserved8[0x00008] | pseudo_bit_t | ||
| log_max_eq[0x00003] | pseudo_bit_t | Log2 of the Maximum number of EQs | |
| reserved9[0x00005] | pseudo_bit_t | ||
| num_rsvd_eqs[0x00004] | pseudo_bit_t | The number of EQs reserved for firmware use | |
| reserved10[0x00004] | pseudo_bit_t | ||
| log_max_mpts[0x00006] | pseudo_bit_t | Log (base 2) of the maximum number of MPT entries (the number of Regions/Windows) | |
| reserved11[0x00002] | pseudo_bit_t | ||
| log_max_eq_sz[0x00008] | pseudo_bit_t | Log2 of the Maximum EQEs allowed in a EQ | |
| log_max_mtts[0x00006] | pseudo_bit_t | Log2 of the Maximum number of MTT entries | |
| reserved12[0x00002] | pseudo_bit_t | ||
| log2_rsvd_mrws[0x00004] | pseudo_bit_t | Log (base 2) of the number of MPTs reserved for firmware use | |
| reserved13[0x00004] | pseudo_bit_t | ||
| log_max_mrw_sz[0x00008] | pseudo_bit_t | Log2 of the Maximum Size of Memory Region/Window | |
| reserved14[0x00004] | pseudo_bit_t | ||
| log2_rsvd_mtts[0x00004] | pseudo_bit_t | Log (base 2) of the number of MTT entries reserved for firmware use | |
| reserved15[0x00020] | pseudo_bit_t | ||
| log_max_ra_res_qp[0x00006] | pseudo_bit_t | Log2 of the Maximum number of outstanding RDMA read/Atomic per QP as a responder | |
| reserved16[0x0000a] | pseudo_bit_t | ||
| log_max_ra_req_qp[0x00006] | pseudo_bit_t | Log2 of the maximum number of outstanding RDMA read/Atomic per QP as a requester | |
| reserved17[0x0000a] | pseudo_bit_t | ||
| log_max_ra_res_global[0x00006] | pseudo_bit_t | Log2 of the maximum number of RDMA read/atomic operations the HCA responder can support globally. That implies the RDB table si | |
| reserved18[0x00016] | pseudo_bit_t | ||
| log2_rsvd_rdbs[0x00004] | pseudo_bit_t | Log (base 2) of the number of RDB entries reserved for firmware use | |
| rsz_srq[0x00001] | pseudo_bit_t | Ability to modify the maximum number of WRs per SRQ. | |
| reserved19[0x0001f] | pseudo_bit_t | ||
| num_ports[0x00004] | pseudo_bit_t | Number of IB ports. | |
| max_vl[0x00004] | pseudo_bit_t | Maximum VLs supported on each port, excluding VL15 | |
| max_port_width[0x00004] | pseudo_bit_t | IB Port Width | |
| max_mtu[0x00004] | pseudo_bit_t | Maximum MTU Supported | |
| local_ca_ack_delay[0x00005] | pseudo_bit_t | The Local CA ACK Delay. This is the value recommended to be returned in Query HCA verb. | |
| reserved20[0x0000b] | pseudo_bit_t | ||
| log_max_gid[0x00004] | pseudo_bit_t | Log2 of the maximum number of GIDs per port | |
| reserved21[0x0001c] | pseudo_bit_t | ||
| log_max_pkey[0x00004] | pseudo_bit_t | Log2 of the max PKey Table Size (per IB port) | |
| reserved22[0x0000c] | pseudo_bit_t | ||
| stat_rate_support[0x00010] | pseudo_bit_t | bit mask of stat rate supported | |
| reserved23[0x00020] | pseudo_bit_t | ||
| rc[0x00001] | pseudo_bit_t | RC Transport supported | |
| uc[0x00001] | pseudo_bit_t | UC Transport Supported | |
| ud[0x00001] | pseudo_bit_t | UD Transport Supported | |
| rd[0x00001] | pseudo_bit_t | RD Transport Supported | |
| raw_ipv6[0x00001] | pseudo_bit_t | Raw IPv6 Transport Supported | |
| raw_ether[0x00001] | pseudo_bit_t | Raw Ethertype Transport Supported | |
| srq[0x00001] | pseudo_bit_t | SRQ is supported | |
| ipo_ib_checksum[0x00001] | pseudo_bit_t | IP over IB checksum is supported | |
| pkv[0x00001] | pseudo_bit_t | PKey Violation Counter Supported | |
| qkv[0x00001] | pseudo_bit_t | QKey Violation Coutner Supported | |
| reserved24[0x00006] | pseudo_bit_t | ||
| mw[0x00001] | pseudo_bit_t | Memory windows supported | |
| apm[0x00001] | pseudo_bit_t | Automatic Path Migration Supported | |
| atm[0x00001] | pseudo_bit_t | Atomic operations supported (atomicity is guaranteed between QPs on this HCA) | |
| rm[0x00001] | pseudo_bit_t | Raw Multicast Supported | |
| avp[0x00001] | pseudo_bit_t | Address Vector Port checking supported | |
| udm[0x00001] | pseudo_bit_t | UD Multicast Supported | |
| reserved25[0x00002] | pseudo_bit_t | ||
| pg[0x00001] | pseudo_bit_t | Paging on demand supported | |
| r[0x00001] | pseudo_bit_t | Router mode supported | |
| reserved26[0x00006] | pseudo_bit_t | ||
| log_pg_sz[0x00008] | pseudo_bit_t | Minimum system page size supported (log2). | |
| reserved27[0x00008] | pseudo_bit_t | ||
| uar_sz[0x00006] | pseudo_bit_t | UAR Area Size = 1MB * 2^uar_sz | |
| reserved28[0x00006] | pseudo_bit_t | ||
| num_rsvd_uars[0x00004] | pseudo_bit_t | The number of UARs reserved for firmware use | |
| reserved29[0x00020] | pseudo_bit_t | ||
| max_desc_sz_sq[0x00010] | pseudo_bit_t | Max descriptor size in bytes for the send queue | |
| max_sg_sq[0x00008] | pseudo_bit_t | The maximum S/G list elements in a SQ WQE (max_desc_sz/16 - 3) | |
| reserved30[0x00008] | pseudo_bit_t | ||
| max_desc_sz_rq[0x00010] | pseudo_bit_t | Max descriptor size in bytes for the receive queue | |
| max_sg_rq[0x00008] | pseudo_bit_t | The maximum S/G list elements in a RQ WQE (max_desc_sz/16 - 3) | |
| reserved31[0x00008] | pseudo_bit_t | ||
| reserved32[0x00040] | pseudo_bit_t | ||
| log_max_mcg[0x00008] | pseudo_bit_t | Log2 of the maximum number of multicast groups | |
| num_rsvd_mcgs[0x00004] | pseudo_bit_t | The number of MGMs reserved for firmware use in the MGHT. | |
| reserved33[0x00004] | pseudo_bit_t | ||
| log_max_qp_mcg[0x00008] | pseudo_bit_t | Log2 of the maximum number of QPs per multicast group | |
| reserved34[0x00008] | pseudo_bit_t | ||
| log_max_rdds[0x00006] | pseudo_bit_t | Log2 of the maximum number of RDDs | |
| reserved35[0x00006] | pseudo_bit_t | ||
| num_rsvd_rdds[0x00004] | pseudo_bit_t | The number of RDDs reserved for firmware use | |
| log_max_pd[0x00006] | pseudo_bit_t | Log2 of the maximum number of PDs | |
| reserved36[0x00006] | pseudo_bit_t | ||
| num_rsvd_pds[0x00004] | pseudo_bit_t | The number of PDs reserved for firmware use | |
| reserved37[0x000c0] | pseudo_bit_t | ||
| qpc_entry_sz[0x00010] | pseudo_bit_t | QPC Entry Size for the device | |
| eec_entry_sz[0x00010] | pseudo_bit_t | EEC Entry Size for the device | |
| eqpc_entry_sz[0x00010] | pseudo_bit_t | Extended QPC entry size for the device | |
| eeec_entry_sz[0x00010] | pseudo_bit_t | Extended EEC entry size for the device | |
| cqc_entry_sz[0x00010] | pseudo_bit_t | CQC entry size for the device | |
| eqc_entry_sz[0x00010] | pseudo_bit_t | EQ context entry size for the device | |
| uar_scratch_entry_sz[0x00010] | pseudo_bit_t | UAR Scratchpad Entry Size | |
| srq_entry_sz[0x00010] | pseudo_bit_t | SRQ context entry size for the device | |
| mpt_entry_sz[0x00010] | pseudo_bit_t | MPT entry size in Bytes for the device. | |
| mtt_entry_sz[0x00010] | pseudo_bit_t | MTT entry size in Bytes for the device. | |
| bmme[0x00001] | pseudo_bit_t | Base Memory Management Extension Support | |
| win_type[0x00001] | pseudo_bit_t | Bound Type 2 Memory Window Association mechanism: | |
| mps[0x00001] | pseudo_bit_t | Ability of this HCA to support multiple page sizes per Memory Region. | |
| bl[0x00001] | pseudo_bit_t | Ability of this HCA to support Block List Physical Buffer Lists. (The device does not supports Block List) | |
| zb[0x00001] | pseudo_bit_t | Zero Based region/windows supported | |
| lif[0x00001] | pseudo_bit_t | Ability of this HCA to support Local Invalidate Fencing. | |
| reserved38[0x00002] | pseudo_bit_t | ||
| log_pbl_sz[0x00006] | pseudo_bit_t | Log2 of the Maximum Physical Buffer List size in Bytes supported by this HCA when invoking the Allocate L_Key verb. | |
| reserved39[0x00012] | pseudo_bit_t | ||
| resd_lkey[0x00020] | pseudo_bit_t | The value of the reserved Lkey for Base Memory Management Extension | |
| lamr[0x00001] | pseudo_bit_t | When set the device requires local attached memory in order to operate. | |
| reserved40[0x0001f] | pseudo_bit_t | ||
| max_icm_size_h[0x00020] | pseudo_bit_t | Bits [63:32] of maximum ICM size InfiniHost III Ex support in bytes. | |
| max_icm_size_l[0x00020] | pseudo_bit_t | Bits [31:0] of maximum ICM size InfiniHost III Ex support in bytes. | |
| reserved41[0x002c0] | pseudo_bit_t |
See Also
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